Yang Sun

Short Bio:

I am a third-year graduate student in the ECE department at Rice University. I received my M.S. from the Zhejiang University in China. I currently work under Dr. Joseph Cavallaro in the VLSI Signal Processing research group. I am also a member of Center for Multimedia Communication (CMC).

My current research focuses on the physical layer design for next generation wireless communications (B3G/4G). My most recently research focuses on VLSI architecture design for low-density parity-check (LDPC) codes, turbo codes, convolutional codes, and deep submicron digital VLSI design using Synopsys, Cadence and Mentor tools.

Research interests:

VLSI Signal Processing.
Base-band wireless transmitter and receiver design, especially MIMO transceiver.
ASIC/FPGA implementation for wireless communication.
Micro-processor design.
Video and Graphics chip design.

Projects:

Parallel hardware design for MIMO OFDM systems – physical layer.
Low Density Parity Check (LDPC) encoder/decoder architecture design for next generation wireless communications.
Turbo Decoder architecture design for 3GPP LTE/WiMax.
Viterbi Decoder architecture design for wireless communications.
WARP: Wireless Open-Access Research Platform

Publication:

Y. Sun, Y. Zhu, M. Goel and J. R. Cavallaro, “Configurable and Scalable High Throughput Turbo Decoder Architecture for Multiple 4G Wireless Standards”. in 19th IEEE International Conference on Application-specific System, Architectures and Processors (ASAP-08). July 2008, Leuven, Belgium. (Accepted)
Y. Sun, M. Karkooti and J. R. Cavallaro, “VLSI Decoder Architecture for High Throughput, Variable Block-Size and Multi-Rate LDPC Codes”. 2007 IEEE International Symposium on Circuits and Systems (ISCAS-07). May 2007, New Orleans. [PDF]
Y. Sun, M. Karkooti and J. R. Cavallaro, “High Throughput, Parallel, Scalable LDPC Encoder/Decoder Architecture for OFDM Systems”. IEEE Dallas Circuits and Systems Workshop (DCAS-06). Oct 2006, Dallas. [PDF]
K. Amiri, Y. Sun, P. Murphy, C. Hunter, J. R. Cavallaro and A. Sabharwal, “WARP, a Modular Testbed for Configurable Wireless Network Research at Rice”, in IEEE Symposium for Space Applications of Wireless & RFID, 2007, Houston. [PDF]
K. Amiri, Y. Sun, P. Murphy, C. Hunter, J. R. Cavallaro and A. Sabharwal, “WARP, a Unified Wireless Network Testbed for Education and Research”, in IEEE International Conference on Microelectronics Systems Education, 2007, San Diego. [PDF]

Poster:

Yang Sun, Y. Zhu, M. Goel and J. R. Cavallaro “Scalable and High Throughput Turbo Decoder Design for 4G Wireless Standards". TI Developer Conference 2008. [PPT]
Yang Sun, and J. R. Cavallaro, “Wireless Video Streaming and Tracking Utilizing TI DaVinci Technology”. TI Developer Conference 2007. [PPT]

Work Experience:

Student Intern at Texas Instrument Corporation, 2007.
ASIC design for Direct Broadcast Satellite set-top box chipset with Conexant Systems Inc, 2004 - 2005
ASIC design for Computer 3D Graphics Processing Unit (GPU) with S3 Graphics Inc, 2003 - 2004