ASAP 2003

Tuesday, 24 June 2003

• "Context-Aware Process Networks"
  H.W. van Dijk, H.J. Sips, Delft University of Technology
  E.F. Deprettere, Leiden University
  
  
• "Multi-dimensional Incremental Loop Fusion for Data Locality"
  Sven Verdoolaege, Francky Catthoor, Maurice Bryunooghe, Gerda Janssens
  Katholieke Universiteit Leuven
  
  
• "Switched Memory Architectures -- Moving Beyond Systolic Arrays"
  Lakshminarayanan Renganarayana, Sanjay Rajopadhye
  Colorado State University
  
  
• "Hardware Synthesis for Multi-Dimensional Time"
  Anne-Claire Guillou, Patrice Quinton, Irisa, Campus de Beaulieur
  Tanguy Risset, Inria, Lip, ENS-Lyon
  
  
• "Using Group Theory to Specify Application Specific Interconnection Networks for SIMD DSPs"
  Thorsten Dräger, Gerhard P. Fettweis
  Dresden University of Technology
  

• "Systematic Register Bypass Customization for Application-Specific Processors"
  Kevin Fan, Nathan Clark, Michael Chu, K. V. Manjunath, Rajiv Ravindran, Mikhail Smelyanskiy, Scott Mahlke
  University of Michigan
  
  
• "Storage Management in Process Networks Using the Lexicographically Maximal Preimage"
  Alex Turjan, Bart Kienhuis
  Leiden University
  
  
• "Energy Aware Register File Implementation through Instruction Predecode"
  Jose L. Ayala, Marisa Lopez-Vallejo, Alex Veidenbaum, Carlos A. Lopez
  University of California, Irvine
  
  
• "Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics"
  Terry Tao Ye, Giovanni De Micheli
  Stanford University
  
  
• "Automatic Instruction Set Extension and Utilization for Embedded Processors"
  Armita Peymandoust, Stanford University
  Laura Pozzi, Paolo Ienne, Swiss Federal Institute of Technology Lausanne
  Giovanni De Micheli, Stanford University
  
  

• "Nanotechnology in the Development of Future Computing Systems"
  Toshi Yamada, Meyya Meyyappan
  NASA Ames Research Center
  
  
• "Circuit Characteristics of Molecular Electronic Components"
  David Janes, Purdue University
  S. Ghosh, Jawaharlal Nehru University
  J. Choi, S. Lodha, S. Bhattacharya, Purdue University
  
  
• "Reconfigurable Computing and Electronic Nanotechnology"
  Seth Goldstein, Mihai Budiu, Mahim Mishra, and Girish Venkataramani
  Carnegie Mellon University
  

Wednesday, 25 June 2003

• "Using Media Processors for Low-Memory AES Implementation"
  J. Irwin, D. Page
  University of Bristol
  
  
• "Variable-Length Instruction Compression for Area Minimization"
  Piia Simonen, Ilkka Saastamoinen, Jari Nurmi
  Tampere University of Technology
  
  
• "A Generic Tool-Set for SoC Multiprocessor Debugging and Synchronization"
  Andreas Wieferink, Tim Kogel, RWTH Aachen
  Achim Nohl, Andreas Hoffmann, LISATek GmbH
  Rainer Leupers, Heinrich Meyr, RWTH Aachen
  
  
• "Evaluating Memory Architectures for Media Applications on Coarse-Grained Reconfigurable Architectures"
  Jong-eun Lee, Kiyoung Choi, Seoul National University
  Nikil Dutt, University of California, Irvine
  
  
• "Application-Specific Computing with Adaptive Register File Architectures"
  Rama Sangireddy, Arun K. Somani
  Iowa State University
  

• "A Floating-Point, CORDIC Based SVD Processor"
  Zhaohui Liu, K.Dickson, J. V. McCanny
  Queen's University of Belfast
  
  
• "Combined Multiplication and Sum-of-Squares Units"
  Michael J. Schulte, University of Wisconsin-Madison
  Louis Marquette, Lehigh University
  Shankar Krithivasan, University of Wisconsin-Madison
  E. George Walters III, Lehigh University
  John Glossner, Sandbridge Technologies
  
  
• "Comparison of Branching CORDIC Implementations"
  Abhishek Singh, Dhananjay S. Phatak, Tom Goff, Mike Riggs, James Plusquellic, Chintan Patel
  University of Maryland Baltimore County
  
  
• "Unified Radix-4 Multiplier for GF(p) and GF(2^n)"
  Lai-Sze Au, Neil Burgess
  Cardiff University
  
  
• "Arbitrary Bit Permutations in One or Two Cycles"
  Zhijie Shi, Xiao Yang, Ruby B. Lee
  Princeton University
  

• "Color Space Conversion for MPEG Decoding on FPGA-augmented TriMedia Processor"
  Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T.J. van Eijndhoven
  Delft University of Technology
  
  
• "Reducing Dynamic Power Consumption in Next Generation DS-CDMA Mobile Communication Receivers"
  V. Chandrasekhar, F. Livingston, J. R. Cavallaro
  Rice University
  
  
• "An Efficient Disk-Array-Based Server Design for a Multicast Video Streaming System"
  P. H. Chan, Jack Y. B. Lee
  Chinese University of Hong Kong
  
  
• "An Efficient PIM (Processor-In-Memory) Architecture for Motion Estimation"
  Jung-Yup Kang, Saurab Shah, Sandeep Gupta, University of Southern California
  Jean-Luc Gaudiot, University of California, Irvine
  
  
• "A VLSI Architecture for Advanced Video Coding Motion Estimation"
  Swee Yeow Yap, John V. McCanny
  Queen's University of Belfast
  

• "Complex Division with Prescaling of Operands"
  Milos Ercegovac, University of California, Los Angeles
  Jean-Michel Muller, Ecole Normale Superieure de Lyon
  
  
• "Iterative Methods for Logarithmic Subtraction"
  M. G. Arnold
  Lehigh University
  
  
• "A Family of Parallel-Prefix Modulo $2^n-1$ adders"
  G. Dimitrakopoulos, H. T. Vergos, D. Nikolos, C.Efstathiou
  University of Patras
  
  
• "Performance-Improved Computation of Very Large Word-Length LNS Addition/Subtraction Using Signed-Digit Arithmetic"
  Chichyang Chen, Rui-Lin Chen
  Feng Chia University
  
  
• "Decimal Multiplication Via Carry-Save Addition"
  Mark A. Erle, Leigh University
  Michael J. Schulte, University of Wisconsin-Madison
  

Thursday, 26 June 2003

• "Reconfigurable Viterbi Decoding using a New ACS Pipelining Technique"
  Y. Zhu, M. Benaissa
  University of Sheffield
  
  
• "Application-Specific DSP Architecture For Fast Fourier Transform"
  Kyung L. Heo, Sung M. Cho, Jung H. Lee, Myung H. Sunwoo
  Ajou University
  
  
• "An Architecture for a Radix-4 Modular Pipeline Fast Fourier Transform"
  Ayman M. El-Khashab, Earl E. Swartzlander, Jr.
  University of Texas at Austin
  
  
• "GFS: An Efficient Implementation of Fair Scheduling for multi-Gigabit Packet Networks"
  George Kornaros, Theofanis Orphanoudakis, Ioannis Papaefstathiou
  Ellemedia Technologies
  
  
• "Area and Time Efficient Modular Multiplication of Large Integers"
  Viktor Bunimov, Manfred Schimmler
  Technical University of Braunschweig
  

• "Modular Multiplication for FPGA Implementation of the IDEA Block Cipher"
  Jean-Luc Beuchat
  CNRS, ENS Lyon, INRIA
  
  
• "Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm"
  Guido Bertoni, Luca Breveglieri, Politecnico di Milano
  Israel Koren, University of Massachusetts, Amherst
  Paolo Maistri, Vincenzo Piuri, Politecnico di Milano
  
  
• "Hardware Implementation of an Elliptic Curve Processor over GF(p)"
  Siddika Berna Ors, Lejla Batina, Bart Preneel, Joos Vandewalle
  Katholieke Universiteit Leuven
  
  
• "A Cryptographic Processor for Arbitrary Elliptic Curves over GF(2^m)"
  Hans Eberle, Nils Gura, Sheueling Chang-Shantz
  Sun Microsystems Laboratories
  
  
• "Instruction Set Extension for Fast Elliptic Curve Cryptography over Binary Finite Fields GF(2^m)"
  Johann Groszschaedl, Guy-Armand Kamendje
  Graz University of Technology
  

Comments/questions on this page to Joseph Cavallaro at cavallar@rice.edu