B.S.E.E. (1981) University of PennsylvaniaIn August 1988, he joined the faculty of Rice University, Houston, Texas, where he is a Professor in the Department of Electrical and Computer Engineering and by courtesy in the Department of Computer Science. He is also Associate Director of the Center for Multimedia Communication at Rice. Professor Joe Cavallaro's research is in special-purpose VLSI processor architectures. Advances in VLSI technology have made possible the implementation of special-purpose processors for signal processing, computer graphics, and robotics. Many of these applications involve a core group of matrix computations that can be efficiently performed on parallel arrays of functional units. In particular, important numerical algorithms for wireless communication systems can greatly benefit from enhanced parallel architectures and high-speed computer arithmetic. These algorithms and their efficient mapping to low-power architectures are studied on DSP, ASIC, and Application-specific Instruction Processors (ASIP).
M.S.E.E. (1982) Princeton University
Ph.D. (1988) Cornell University
Professor Cavallaro, in collaboration with Professor Aazhang, is developing parallel architectures for code division multiple access (CDMA) wireless communication systems. This involves the use of parallel arrays of DSP/FPGA processors and custom VLSI processor architectures.
VLSI Signal Processing for Communications Group
Center for Multimedia Communication, and the CMC Research Laboratory.
Professor Cavallaro has taught the VLSI Systems Design courses at Rice University, including Elec422: VLSI Design I . MOSIS VLSI chip photos from the 2003-2004 class and the 2002-2003 class VLSI projects and the Rice-AMD Design Contest.
Rice-TI DSP Elite Laboratory dedication photos and Rice News article.
Professor Cavallaro is Chair of the Houston Chapter of the IEEE Circuits and Systems Society, is General Co-Chair for the 2004 IEEE 15th International Conference on Application-specific Systems, Architectures and Processors, and Co-Chair for the 2004 IEEE Globecom Symposium on Signal Processing for Communications. He was Program Co-Chair for the 2003 IEEE 14th ASAP Conference, and was Publicity Chair for the 1997 IEEE 13th Symposium on Computer Arithmetic. He is also an IEEE Computer Society Distinguished Visitor 2004-2006, and Chair of the Technical Committee on VLSI.
A more detailed biography with links to publications is located here. The Center for Multimedia Communication publication database also has links to publications.
Together with Professor Walker at Clemson University, Professor Cavallaro has studied fault tolerance in robotic systems. They have developed low-overhead fault detection and reconfiguration strategies for robots destined for space and hazardous environments. (See Cooperative Autonomous Robots for Hazardous Environments Group).
Professor Cavallaro, in collaboration with Professors Tittel and Wilson, has also investigated manufacturing issues in VLSI microlithography. Their goal has been to integrate technology and system-design CAD tools to improve the manufacturing yield of VLSI chips. (See Enhanced VLSI Microlithography ).
The Cavallaro Family Page.
Rice University ECE Department Contact Information
Updated October 2005.