Bio

I am a second year graduate student in the ECE Department at Rice University. I work with Professor Joseph R. Cavallaro in the field of architectures for wireless communications. My research interests are in VLSI system design for ASIPs and in design and implementation of baseband algorithms for wireless communication systems.

Projects

• An FPGA-based Daughtercard Design for TI's C6000 DSKs

  We designed a Xilinx Virtex-II Pro based daughtercard for TI's C6000 family of DSP Starter Kits (DSKs). Our paper on the design and it's use in an educational setting will appear in the proceedings of 2005 International Conference on Microelectronics Systems Education . For details on the project, please refer to the project webpage.

• Channel Estimation for Fast-Fading Environments

  In this project I explored channel estimation for fast-fading environments using Wiener-LMS algorithm. The channel is modelled as an auto-regressive process and this information is used to improve channel estimation while maintaing low-complexity. The project report is available here.

• Carrier Offset and Symbol Timing Recovery for Wireless OFDM Receiver

  I am currently working with Alexandre de Baynast on synchronization schemes for OFDM systems.

Related Class Work

Wireless Communications Error Correcting Codes Information and Coding Theory Digital Signal Processing Communication Theory and Systems Random Processes

Advanced VLSI Design High Performance Computer Architecture Digital Logic Design Digital Signal Processing Lab Computer-aided design for VLSI Modeling and Desing of High Speed Integrated Circuits

Links

ECE Documents Database
Rice ECE Website