| Time |
Topic
|
Speaker & Affiliation
|
| Saturday, June 2 |
| 8:00am - 10:00am |
Asynchronous Circuits and Systems for Nanoelectronics |
Alain
Martin, California Institute of Technology |
| 10:00am - noon |
Energy Efficient Circuit Technologies for the Multi-core Era
|
Ram
Krishnamurthy and Himanshu Kaul,
Intel
|
| Noon - 1:00pm |
Lunch |
| 1:00pm - 3:00pm |
On-Chip Networks: Why, What, and How |
Radu
Marculescu, Carnegie Mellon
University
|
| 3:00pm - 5:00pm |
Design and CAD for Manufacturability |
David Pan,
University of Texas,
Austin
|
| Sunday, June 3 |
| 8:00am - 10:00am |
One-dimensional Nanostructures for Nanoelectronics
|
Jing Guo, University
of Florida
|
| 10:00am - noon |
System Design for Atomic-Scale Electronics
|
Andre DeHon,
University of Pennsylvania
|
| Noon - 1:00pm |
Lunch |
| 1:00pm - 3:00pm |
Statistical Design and Optimization
|
Michael
Orshansky, University of Texas,
Austin
|
| 3:00pm - 5:00pm |
Nonlinear and Parametric Circuit Modeling
|
Joel
Phillips, Cadence Berkeley
Labs
|
