Sridhar Rajagopal Ph.D. May 2004 Dept. of Electrical & Computer Engineering Rice University Houston TX 77005 Member of Technical Staff WiQuest Communications Inc. http://www.wiquest.com E-mail: sridhar [at] rice.edu

Ph.d. Thesis: Data-parallel Digital Signal Processors: Algorithm Mapping, Architecture Scaling and Workload Adaptation

Sridhar Rajagopal was a Ph.D. student in the ECE Department at Rice University, graduating in May 2004. He is currently employed at WiQuest Communications, Inc. and is responsible for designing, architecting and simulating portions of the WiQuest 802.15.3a-compliant physical layer.

My research relates to high-performance computing for embedded systems. My broad research interests are in VLSI signal processing, wireless communications, computer architecture and computer arithmetic, with emphasis on designing real-time architectures and algorithms for wireless communication systems. My advisor is Prof. Joseph R. Cavallaro (VLSI signal processing). I also interact with Prof. Behnaam Aazhang (wireless communications) and Prof. Scott Rixner (computer architecture).

Research

Publications

VLSI Chips

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