RESEARCH

PUBLICATIONS

VLSI CHIPS

RESUME

HOMEPAGE

Publications The most recent versions of the papers are posted here. There may be slight differences with submitted versions

[Publications at the CMC Website]

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· Communication Processors (July 2005)

· Improving power efficiency in stream processors through dynamic cluster reconfiguration (December 2004)

· Design space exploration for real-time embedded stream processors (August 2004)

· Data-parallel Digital Signal Processors: Algorithm Mapping, Architecture Scaling and Workload Adaptation (May 2004)

· Truncated on-line arithmetic with applications to communication systems (March 2004)

· Reconfigurable stream processors for wireless base-stations (October 2003)

· DSP architectural considerations for optimal baseband processing (August 2002)

· A programmable baseband processor design for software defined radios (August 2002)

· Efficient Algorithms and Architectures for Multiuser Channel Estimation and Detection in Wireless Base-Station Receivers (July 2002)

· Efficient VLSI architectures for multiuser channel estimation in wireless base-station receivers (June 2002)

· VLSI implementation of the multistage detector for next generation wideband CDMA receivers (March 2002)

· On-line Arithmetic for Detection in Digital Communication Receivers (June 2001)

· A bit-streaming pipelined multiuser detector for wireless communications (May 2001)

· Task Partitioning Wireless Base-station Receiver Algorithms on Multiple DSPs and FPGAs (October 2000)

· Real-Time DSP Multiprocessor Implementation for Future Wireless Base-Station Receivers (August 2000)

· Efficient VLSI Architectures for Baseband Signal Processing for Wireless Base-Station Receivers (July 2000)

· Baseband Architecture Design for Future Wireless Base-Station Receivers (May 2000)

· Arithmetic Acceleration Techniques for Wireless Communication Receivers (October 1999)

· Implementation of Channel Estimation and Multiuser Detection Algorithms for W-CDMA on Digital Signal Processors (August 1999)

Technical Reports:

• A tech. report on the radix-4 multiplier-adder implementation is available here [PDF] and here is a draft version of some additional work on truncated on-line arithmetic and area-time comparisons with conventional arithmetic [PDF]

• Low power detector architectures using on-line arithmetic for mobile communication receivers, Rice University Tech. Report [PDF]

• Microprocessor extensions for wireless communications, Rice University Tech. Report. [PDF]

• S. Rajagopal, 'Performance evaluation of channel estimation algorithms for W-CDMA on digital signal processors', 599 Report [as part of Ph.D. Qualifying Examination] May 1999 [PDF]

Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works, must be obtained from the IEEE.

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Presentations:

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Data Parallel DSPs, Invited Lecture, National University of Malaysia, Bangi, Malaysia, May 2005

Flexible wireless communication architectures
- Stanford University, July 2003
- Sandbridge Technologies, Inc. July 2003
- Faculty Candidate seminar, Southern Methodist University, Dallas, TX April 2003 [Talk slides]
- Faculty Candidate seminar, University of Rochester, Rochester, NY March 2003 [Talk slides]

SWAPs: Re-thinking mobile and base-station architectures
- Texas Instruments, Dallas, TX March 2003 [Talk slides]

A programmable baseband processor design for software defined radios
- 45th IEEE International Midwest Symposium on Circuits and Systems, Tulsa, OK. August 2002 [Talk slides]

DSP architectural considerations for optimal baseband processing
- TI Developers Conference, Houston, TX. August 2002. [Talk slides]

A programmable communications processor for future wireless systems
- Indian Institute of Technology, Mumbai (IIT-B), India July 2002
- Indian Institute of Technology, Chennai (IIT-M), India July 2002

.Summer Internship Experience [Talk slides]
     - ECE Department Industrial Affliates Meeting - Rice University, Houston, TX, October 2001.

On-line arithmetic for detection in digital communication receivers', [Talk slides]
     - 15 ^th IEEE International Symposium on Computer Arithmetic, Vail, CO, June 2001.

A bit streaming pipelined multiuser detector for wireless communication systems [Talk slides]
- IEEE International Conference on Circuits and Systems (ISCAS), Sydney, Australia., May 2001.

Task partitioning wireless base-station receiver algorithms on multiple DSPs and FPGAs[Talk slides]
- International Conference on Signal Processing Applications and Technology (ICSPAT), Dallas, TX, October 2000.

Efficient VLSI architectures for baseband signal processing in wireless base-station receivers [Talk slides]
       - 12^th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Boston, MA July 2000

DSPs for future wireless base-stations [Talk slides]
       - TI Leadership University Workshop, Texas Instruments, Dallas, TX May 2000

Arithmetic acceleration techniques for wireless communication receivers [Talk slides]
       - 33^rd Asilomar Conference on Signals, Systems and Computers, Asilomar, CA, October 1999.

Implementation of channel estimation and multiuser detection algorithms for W-CDMA on DSPs',
-TI DSPS Fest Educators Conference, Houston, TX. August 1999.[Talk slides]

Presentations to researchers from Texas Instruments and Nokia, 1999-2002

Annual poster presentations at the Industrial Affiliates meeting, Department of Electrical and Computer Engineering, Rice University. 1998-2001

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Bib

My list of citations [PDF][bib]

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