Research Specialist

Nokia Siemens Networks

6000 Connections Dr.

Irving, TX, 75039

Tel: 972-894-4309

Ph.D. in ECE 

Electrical & Computer Engineering

Rice University

Houston, TX

ybguo_nokia@yahoo.com

http://www.linkedin.com/pub/1/aab/651

 

 

Refereed Publications

For a complete list of publications and for downloading papers in pdf format please visit the Rice CMC document database.

 

  1. P. Radosavljevic, Y. Guo, J. R. Cavallaro, Probability based Bounded Soft Sphere Detection for MIMO-OFDM Systems: system and VLSI Architecture, to be submitted to IEEE Trans. Circuits and Systems I, 2007.

 

  1. Y. Guo, J. Zhang, D. McCain, J. R. Cavallaro, Structured parallel architecture for displacement MIMO Kalman equalizer in CDMA systems, IEEE Trans. On Circuits and Systems II, Vol. 54, pp. 122-126, Feb. 2007.

 

  1. Y. Guo, D. McCain, J. R. Cavallaro, Rapid Industrial Prototyping and Scheduling of 3G/4G SoC Architectures with HLS Methodology, accepted for publication in EURASIP Journal on Embedded Systems, special issue on Signal Processing with High Complexity, Vol. 2006, article ID 14952, 2006.

 

  1. Y. Guo, J. Zhang, D. McCain, J. Cavallaro, An Efficient Circulant MIMO Equalizer for CDMA Downlink: Algorithm and VLSI Architecture, EURASIP Journal on Applied Signal Processing 2006 (2006), Article ID 57134, 18 pages.

 

  1. Y. Guo, D. McCain, Rapid Prototyping and VLSI Exploration for 3G/4G MIMO Wireless Systems Using Integrated Catapult-C Methodology, IEEE Wireless Communications and Networking Conference (WCNC), pp. 958- 963, Las Vegas, April, 3-6th, 2006.

 

6.        Y. Guo, J. R. Cavallaro, A low complexity and low power SoC design architecture for adaptive MAI suppression in CDMA systems, Journal of VLSI signal processing Systems for Signal, Image and Video Technology, Vol. 44, pp. 195-217, Sept. 2006.

 

  1. Y. Guo, J. Zhang, D. McCain, J. Cavallaro, Displacement MIMO Kalman equalizer architecture for CDMA downlink in fast fading channels, submitted to IEEE Trans. on Wireless Communications, 1st revision under review, July, 2005.

 

  1. Y. Guo, Advanced MIMO-CDMA Receiver for Interference Suppression: Algorithms, System-on-Chip Architectures and Design Methodology, Ph.D. Thesis, Rice University, Houston, TX, May 2005.

 

  1. Y. Guo, J. Zhang, D. McCain, J. Cavallaro, Displacement MIMO Kalman Equalizer for CDMA Downlink in Fast Fading Channels,  IEEE Globecom 2005, pp.2281-2286, St. Louis, MO, Nov. 28th-Dec. 2nd,  2005.

 

  1. Y. Guo, D. McCain, Pipelined and Reduced QRD-M Detector in MIMO-OFDM Systems With Partial and Embedded Sorting, IEEE Globecom 2005, pp.187-192, St. Louis, MO, Nov.28th-Dec. 2nd, 2005.

 

  1. Y. Guo, D. McCain, J. Cavallaro, Low Power VLSI Architecture for Adaptive MAI Suppression in CDMA Using Multi-stage Convergence Masking Vector, IEEE Vehicular Technology Conference (VTC), pp.1761-1766, Dallas, TX,  Sep. 28th 2005.

 

  1. Y. Guo, D. McCain, J. Cavallaro, Hermitian Optimization and Scalable VLSI Architecture for Circulant Approximated MIMO Equalizer in CDMA Downlink, IEEE VTC, pp. 2096-2101, Dallas, TX, September 28th 2005.

 

  1. Y. Guo, D. McCain, J. Cavallaro, FFT-Accelerated Iterative MIMO Chip Equalizer Architecture For CDMA Downlink, IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), Vol. 3, pp.1005 - 1008, March 18-23, 2005.

 

  1. Y. Guo, Efficient VLSI Architectures for Recursive Vandermonde QR Decomposition in Broadband OFDM Pre-distortion, IEEE Wireless Communications and Networking Conference (WCNC), Vol.1, pp.589 - 595,13-17 March 2005.

 

  1. Y. Guo and D. McCain, Untimed-C based SoC Architecture Design Space Exploration for 3G and Beyond Wireless Systems, Design and Verification Conference, San Jose, CA, February 2005.

 

  1. Y. Guo, J. Zhang, D. McCain, J. Cavallaro, Efficient MIMO equalization for downlink multi-code CDMA: complexity optimization and comparative study, IEEE GlobeCom, pp. 2513 - 2519, Volume 4, No. 7, Dallas, Tx, (November 2004).

 

  1. Y. Guo, D. McCain, Compact Hardware Accelerator for Functional Verification and Rapid Prototyping of 4G Wireless Communication Systems, IEEE the 38th Asilomar Conference on Signals, Systems and Computers, Vol. 1, pp.767-771, 7-10 Nov. 2004.

 

  1. Y. Guo, D. McCain, J. Cavallaro, Low Complexity System-On-Chip Architectures Of Optimal Parallel-Residue-Compensation In CDMA Systems, IEEE International Symposium on Circuits and Systems (ISCAS),  pp:IV - 77-80, Volume 4, No. 4, Vancouver, Canada, May 2004.

 

  1. Y. Guo, D. McCain, J. Zhang, J. Cavallaro, Scalable FPGA Architectures for LMMSE-based SIMO Chip Equalizer in HSDPA Downlink, IEEE Asilomar Conference on Signals, Systems, and Computers, pp. 2171 - 2175, Volume 2, Monterey, CA, November 2003.

 

  1. Y. Guo, D. McCain, G. Xu, J. Cavallaro, Rapid Scheduling of Efficient FPGA Architectures for Next-Generation HSDPA Wireless System Using Precision C Synthesizer, IEEE International Workshop on Rapid Systems Prototyping (RSP'03), pp. 179-185, San Diego, CA,, June 2003.

 

  1. Y. Guo, J. Cavallaro, Enhanced Power Efficiency of Mobile OFDM Radio using Pre-distortion and Post-compensation, pp.214-218, IEEE Vehicular Technology Conference (VTC), Vancouver, Canada, September 2002.

 

  1. Y. Guo, J. R. Cavallaro, Reducing Peak-to-Average Power Ratio in OFDM Systems by adaptive dynamic range companding, Proceeding of 3G Wireless and World Wireless Congress, San Francisco, CA, USA, May 2002.

 

  1. Y. Guo, J. R. Cavallaro, Post-Compensation of RF Non-Linearity in Mobile OFDM Systems by Estimation of Memory-less Polynomial,  IEEE International Symposium on Circuits and Systems (ISCAS), pp.I217-I220, Phoenix, AZ, May 2002.

 

  1. Y. Guo, J. R. Cavallaro, A Novel Adaptive Pre-Distorter Using LS Estimation of SSPA Non-Linearity in Mobile OFDM Systems, IEEE International Symposium on Circuits and Systems (ISCAS), pp. III453-456, Phoenix, AZ, USA, May 2002.

 

  1. Y. Guo, H. Zhou, X. Wang, J. Cavallaro, VLSI Implementation of Mallat's Fast Discrete Wavelet, IEEE Globecom pp.320-324, San. Antonio, TX, November 2001.

 

  1. Y. Guo, B. Wen, Q. Li, et.al., Real time extraction of targets' parameter of sonar by wavelet on TMS320 DSP, IEEE  International Conference on Communication Technologies (ICCT), pp.S36.04.1-S36.04.5, Beijing, China, 1998.

 

Technical Reports

  1. Y. Guo, “Hardware feasibility study and fixed-point implementation of Sigs2D lattice decoder”, NRC tech report, 2005.
  2. Y. Guo, T. Bhatt, M. Heikkila, D. McCain, Superfast parallel space-time linear MMSE equalizer for communications, submitted NRC invention report NC17815, 2005.
  3. Y. Guo, G. Xu, K. Anand, D. Mccain, “Real-time FPGA implementation of time-domain equalizer using generalized Schur Algorithm for outdoor OFDM systems”, Nokia Research Center, technical report, Sept. 2001.
  4. B. Jones, M. Gadhiok, Y. Guo, S. Rajagopal, “Rapid prototyping for digital signal processing algorithms”, Rice University RENE project technical report, 2001.
  5. Y. Guo, J. Cavallaro, B. Aazhang, A. Sabhaval, “Wideband RF modeling & baseband design for W-CDMA systems”, Rice University, RENE Technical report & PhD qualifying report, 2000.

 

 

 

 

 

 

Copyright ©2002 - 2007 Yuanbin Guo Email: ybguorice@gmail.com for comments.