Errata for
Computer Organization & Design
by Patterson and Hennessy

This page contains a list of known and/or suspected mistakes and confusions in the Elec 320 textbook, Computer Organization and Design: The Hardware/Software Interface by Patterson and Hennessy. If you have found mistakes or something you think may be a mistake, please send email to jrj@rice.edu identifying the location of the error and what you think may be wrong. Please send anything suspicious, even if you are not sure it is an error. We will check it out and post it here. Comments on the posted items are welcome, especially if you don't think it really is an error.

Chapter 3


Page 120, Answer to the example:

The answer to the example on page 120 implies that the stack is growing towards high addresses, while Appendix A clearly states that the system stack grows towards low addresses. While this is not technically an error, it may lead to confusion. The stack in the example could grow towards low address if register 24 holds a negative number, but the text does not give the value in the register. Moreover, there is nothing to prevent a program from implementing a stack that grows towards high addresses, and maybe the authors intended that.


Page A-28, last line

It would be better if the instruction "j ra" were written "jr ra". It turns out that the assembler will recognize "j ra" and translate it into "jr ra" automatically, so the instruction is functionally correct. However, why use a pseudo instruction when the real instruction is more descriptive of what is really going on.


Pages A-59 and A-60, the bgezal instruction

The bgezal instruction is repeated on these two pages. It is the same instruction listed twice and there does not appear to by any other instruction left out.


Page A-63, the lwr instruction

The lwr instruction has the wrong opcode. It should be 0x26, not 0x23.


Page A-58, The comment after the sltiu instruction

"Set register Rd to 1" should be "Set register Rt to 1." There is no rd field in this instruction.


Page A-54, the "not" pseudo operation

The text says that this operation complements all the bits of Rsrc and puts the result in Rdest. The code produced on the mac is

xori Rdest, Rsrc, 1

This only complements the least significant bit of Rsrc. The instruction

xori Rdest, Rsrc, -1

will complement all the bits of the source, but the assembler must produce the following three instructions to do it

lui $1, -1 # load the top half of $1 with all 1's
ori $1, $1, -1 # load the bottom half of $1 with all 1's
xor Rdest, Rdest, $1 # Do the bit-wise complementation

The sparc version of the simulator implements the not operation correctly. It produces the code

nor Rdest, Rsrc, $0


Page 100, first paragraph

This paragraph seems to imply that Astart, the number in the offset, is a full address when it is really only 16 bits. It turns out that you can use a number bigger than 16 bits and the assembler figures out what you mean and generates the code to implement it, but it may take more than one instruction to do this.


Page 126, the answer to the example

The solution works for the number given, but will not work if bit 15 of that number had been a 1. In that case, since the offset has a 1 in its sign bit position, it will be treated as a negative number and sign extended into the top half of the word. The correct way to load the lower half is to use the ori instruction instead of addi, since the ori zero extends the offset while the addi sign extends the offset. HOWEVER, be careful, if you use a negative decimal number such as -1 for the offset in the ori instruction to get bit 15 a 1, the assembler thinks you really want a 32-bit representation of -1 and proceeds to manufacture it for you with a sequence of three instructions. This results in all 1's in the top half of the 32-bit number which will globber the top half of the word. What you must do is specify the offset as a hexadecimal number (e.g., 0xffff instead of -1). Hence it would have been better to use the following instruction in the example to load the bottom half of the register

ori $16, $16, 0x0900


Throughout Chapter 3:

There are several examples that use a multiply immediate instruction "muli". There is no such instrution in the MIPS instruction set nor does there appear to be a pseudo instruction. At least neither the sparc or mac version of spim recognizes it.

Chapter 4


Page 238, line -9

There seems to be a line left out. I think that "double (sub.d)" should be added to the line.