ABCPU2
Control and Operation of the CPU
Bus Control
In this CPU, there are two buses: a four-bit one for data, and an
eight-bit one for addresses. There are also three groups of instructions,
as grouped by the size of the argument they require, if any. It should also
be mentioned that for every instruction, the Program Counter places its value
onto the address bus, from which the memory address leads to the memory, so
the instruction can be fetched. This happens before anything else that
occurs for each instruction.
PLA and FSM
All control is handled by a PLA which is derived from a finite state machine
which we designed for the purpose. There are seven states plus an error state
for invalid instructions. Zero-operand instructions take 3 cycles (states),
4-bit (data) operand instructions take 4 cycles, and 8-bit (memory) operand
instructions take 6 or 7 (for ALU memory ops) cycles. Please refer to our
FSM diagram for full details (a Postscript
version is also available).
No-Operand Instructions
The first set of instructions is those that require no argument, which are
Zero (ZERO), Shift (SHFT), and Not (NOT). In these instructions, the opcode
is taken from memory and placed on the data bus. From here, it is placed also
into the opcode register. This is the only use of the data buses for these
instructions.
Four-bit Operand Instructions
The second set of instructions is those that require four bits of argument,
in each case representing an immediate value. The instructions in this
group are Load Immediate (LDI), Add Immediate (ADDI), and And Immediate
(ANDI). In these instructions, the opcode is taken from memory and placed on
the data bus. From here, the opcode goes from the data bus to the opcode
register. Next, the immediate value is placed on the data bus. From here,
it feeds into the ALU for use in the instructions named, or, in the case of
LDI, the data bus feeds through a multiplexer that selects the data bus as
the input for the accumulator.
Eight-bit Operand Instructions
The third and final set of instructions is those requiring eight bits of
argument, which for these instructions are used to specify an address in
memory. This group has instructions that behave in some different ways.
The first bit of eight-bit argument instructions is the ALU instructions,
which are Add (ADD), Subtract, (SUB), Bitwise And (AND), and Bitwise Or
(OR). As in the other two groups, the opcode is taken from memory and
placed on the data bus. From there, the opcode goes to the opcode register.
Then the first (high) four bits are loaded from memory onto the data bus.
From here, they are loaded into the high four bits of the address
register and held there. The last (low) four bits of the address are
loaded into the low four bits of the address register. See the address generator diagram for more. Now completely written,
the eight bits of the address register are loaded onto the address bus,
from whence they proceed to the address input of memory. With the address in
memory specified, the value stored in that location is placed on the data bus,
and from there, it proceeds to the ALU for use in the instruction.
The next group of eight-bit operand instructions is the branches, Branch Equal
to Zero (BEZ), and Branch Greater than Zero (BGZ). In these, the opcode works
as usual and the memory address is placed onto the address bus as in the ALU
instructions. In these instructions, however, the address on the address bus
will be loaded into the Program Counter based on the output of the comparator
(whether the accumulator is equal to or greater than zero).
For the eight-bit operand instruction Load (LD), the opcode works as in the
eight-bit operand ALU instructions. The rest of LD works as an ALU
instruction, also, except that the four-bit data from memory, once placed on
the data bus, is placed into the accumulator via a multiplexer.
Finally, for the Store (ST) instruction, the opcode is handled as usual. The
first four bits of the memory address are placed from memory onto the data bus
and into the high four bits of the address register. Then the next four bits
of the address are placed from memory onto the data bus and into the low four
bits of the address register. At this point, we can place the accumulator
value onto the data bus. The address register value is placed on the address
bus, and from there it goes into the memory. Also, the value on the data bus
goes to the memory.
Last modified 19 December 1996.