ABCPU2

Cell Hierarchy

We utilized Magic's cell hierarchy tools to simplify the design process at various stages. A top level view of the chip shows the major subcells:

[Top-level hierarchy]

The ALU, which is clearly visible in the chip-level figure, it itself comprised of two major subcells (the arithmetic unit and the logical unit):

[ALU hierarchy]

The same holds for the program counter:

[PC hierarchy]

Our address generator also takes up a good chunk of the top-level figure:

[AG hierarchy]

Both the address generator and the chip itself contain "reg_4bit" register subcells, which are made up of four one-bit latches:

[register hierarchy]

Last modified 19 December 1996.