Achtung, Baby! CPU2
19 December 1996
General Description
We have chosen to design and build a four-bit CPU. The CPU supports a
variety of ALU operations, offers basic memory-handling functions, and allows
simple program flow control through branch instructions.
Architecture
Our CPU is based on the simple accumulator-style architecture.
Thus, it has one register, the accumulator, which is used by program in all
operations. It also contains a Program Counter and an address register for
intermediate calculations of addresses, along with a variety of lesser
components (see block diagram for details; also
see the Postscript version). The accumulator is
four bits, since this is a four-bit CPU. The program counter (PC) and the
address generator register are each eight bits since we need at least eight
bits of memory addressing (4 bits*2^8 = 256 nibbles) to have an
appreciable memory size.
This page provides further details about all parts of our implementation:
Last modified 19 December 1996.