Simulation
Notice:
- There are two blocks of commands.
- First block loads some data to memory for add/sub instructions.
- RIP instruction returns to LOAD mode and load ALUOP instructions.
|out =0011 co goes high near end and beginning (sub op)
clock p_clka 0 1 0 0
clock p_clkb 0 0 0 1
vector in p_in{3:0}
vector out p_out{3:0}
vector state p_sb{0:3}
vector PC p_pc{3:0}
vector IR p_ir{3:0}
vector bus p_bus{3:1}
|enter first block
V p_RESTART 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
V in 1111 1111 1111 1010 1111 1111 1111 0101 0000 1111 1111 1001 0000 1111 1111 1010 1100 1111 1111 0101 0011 1111 1111 0001 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111
V p_enter 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
R
|run first block
V p_enter 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
v p_restart 0
R
|enter next block
V p_RESTART 0
V
V in 1111 1111 1111 1100 1111 1111 1111 1111 0000 1111 1111 1101 0000 1111 1111 1011 1100 1111 1111 1100 0011 1111 1111 1110 0011 1111 1111 0010 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111
V p_enter 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
R
|run next block
V
V p_enter 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
v p_restart 0
R