Test the RIP instuction to reload the IM
Expected Behavior:
In second block, do some ALUops, then write out 0111

CHIPMONC ASSEMBLY

First Block:
addi 0001
rip

Second Block:
addi 1111
ld 0010
not
add 0010
sr
wo
ld 0010
wo
halt

CMD FILE

| rip and load prog1

clock p_clka 0 1 0 0
clock p_clkb 0 0 0 1

vector in p_in{3:0}
vector out p_out{3:0}
vector state p_sb{0:3}
vector PC p_pc{3:0}
vector IR p_ir{3:0}
vector bus p_bus{3:1}

ana in p_enter out p_restart state PC IR p_clka p_clkb p_zeroflag p_carryout p_dmseg p_imseg p_loading p_branch p_halted bus

V p_restart 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

V in 0000 0000 0000 1010 0001 1111 1111 0001 0000 1111 1111 1010 1111 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111 0000 0000 1111 1111

V p_enter 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

R

|run the first block
V
V p_restart 0
V p_enter 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R

|load and run next block
V p_restart 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

V in 0000 0000 0000 1010 0111 1111 1111 0101 0010 1111 1111 1101 0000 1111 1111 1110 0010 1111 1111 1011 0000 1111 1111 0010 0000 1111 1111 0100 0010 1111 1111 0010 0000 1111 1111 0000 0000 1111 1111

V p_enter 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

R

Notice

The first block executes only a short time

Then the PLA returns to State1, waiting for new instructions to be entered

The final output, after doing the ALUops is 0111, as expected