INPUTS: LOADDONE ENTER IR0 IR1 IR2 IR3 RESTART ZEROFLAG IMSEG DMSEG;
OUTPUTS: LOADING HALTED CLEARPC CLEARACC INCPC WRITEIM ENIN LDIMBUFHI LDIMBUFLO READIM
LDTP LDIR ENIMBUFHI ENIMBUFLO ENTP LDMA READDM BR WRITEDM LDOUT ENACC LDACC
LDALUBUF LDIMBUFOUT LDPCBUF BUS2ACC CLEARMA LDIX ENIX;

RESET ON RESTART TO INIT;

INIT: GOTO LOAD1 (CLEARACC CLEARPC CLEARMA LOADING);

LOAD1: CASE (ENTER IMSEG)
10 => LOAD2 (ENIN LDIMBUFLO LOADING);
?1 => FAULT;
ENDCASE => LOAD1 (LOADING);

LOAD2: CASE (ENTER)
1 => LOAD3 (ENIN LDIMBUFHI LDPCBUF LOADING);
ENDCASE => LOAD2 (LOADING);

LOAD3: GOTO LOAD4 (WRITEIM LOADING);

LOAD4: CASE (LOADDONE)
0 => LOAD1 (INCPC LOADING);
1 => RUN0 (INCPC LOADING);
ENDCASE;

RUN0: GOTO IF0 (CLEARPC LOADING);

IF0: CASE (IMSEG)
1 => FAULT;
ENDCASE => IF1 (READIM LDIMBUFOUT LDALUBUF);

IF1: GOTO IF2 (ENIMBUFLO LDIR LDPCBUF);

IF2: GOTO PREEX (ENIMBUFHI LDTP INCPC);

PREEX: CASE (IR3 IR2 IR1 IR0)
010? => EX (ENTP LDMA); --ld/st
111? => OF (ENTP LDMA); --add/sub
1000 => OF (ENIX LDMA); --add
0111 => EX (ENTP LDMA); --ldx
ENDCASE => EX;

OF: CASE (DMSEG)
0 => EX (READDM LDTP);
1 => FAULT;
ENDCASE;

EX: CASE (IR3 IR2 IR1 IR0 ZEROFLAG DMSEG)
?????1 => FAULT;
111??0 => IF0 (ENTP LDACC); --ALUOP
110??0 => IF0 (ENTP LDACC INCPC=0); --ALUOP
10???0 => IF0 (ENTP LDACC INCPC=0); --ALUOP
--including addx
0000?0 => HALT0;
0001?0 => LOAD1 (CLEARPC); -- RIP
0010?0 => IF0 (ENACC LDOUT); -- Write to OUT reg
001110 => IF0 (ENTP BR INCPC); -- taken BRANCH
0100?0 => IF0 (LDACC BUS2ACC READDM); -- LD
0101?0 => IF0 (ENACC WRITEDM); -- ST
0111?0 => IF0 (READDM LDIX); --LDX
ENDCASE => IF0; --NOP and not-taken BRANCH

HALT0: GOTO LOOP (HALTED);

FAULT: GOTO LOOP;

MULT0: GOTO MULT1;

MULT1: GOTO MULT1;

MULT2: GOTO MULT1;