MEG input for FSM

 

INPUTS    :    Restart Init Opcode1 Opcode2 MSBB;
--
OUTPUTS    :    LoadA LoadB SubControl PreMult MultControl PreDiv DivControl DivOut LoadTemp MD_Low LoadOut Reset;


RESET ON Restart TO Idle(Reset);

Idle    :    IF Init THEN Load1(LoadA) ELSE LOOP;

--Inputting two numbers from one set of pads requires two cycles
--Opcode and MSBs gets latched in from input pads with LoadA signal
Load1    :    GOTO Load2(LoadB Reset);

Load2    :    CASE (Opcode1 Opcode2)
        0 0 => Out1(LoadTemp);
        0 1 => Out1(SubControl LoadTemp);
        1 0 => Mult0(PreMult MultControl);
        1 1 => Div1(PreDiv DivControl);
        ENDCASE;

--Addition takes one cycle. This is an open path through the adder.
--Add1    :    GOTO Out1(LoadTemp);

--Subtraction takes one cycle. It inverts B and adds it to A
--plus a carry-in.
--Sub1    :    GOTO Out1(SubControl LoadTemp);

--Multiplication takes eight cycles
Mult0    :    GOTO Mult1(MultControl PreMult);

Mult1    :    GOTO Mult2(MultControl PreMult);

Mult2    :    GOTO Mult3(MultControl PreMult);

Mult3    :    GOTO Mult4(MultControl PreMult);

Mult4    :    GOTO Mult5(MultControl PreMult);

Mult5    :    GOTO Mult6(MultControl PreMult);

Mult6    :    IF MSBB then Mult7(MultControl PreMult LoadOut SubControl) ELSE Mult7(MultControl PreMult LoadOut);

--Here a test occurs for the sign of the multiplier. If it is a one
--then it is negative and the final addition is the partial sum
--plus the inverted multiplier plus a carry-in
Mult7    :    IF MSBB then Out1(LoadTemp MultControl PreMult) ELSE Out1(LoadTemp MultControl PreMult);

--Mult7    :    GOTO Out1(LoadTemp);

--Division takes eight cycles
Div1    :    GOTO Div2(DivControl);

Div2    :    GOTO Div3(DivControl);

Div3    :    GOTO Div4(DivControl);

Div4    :    GOTO Div5(DivControl);

Div5    :    GOTO Div6(DivControl);

Div6    :    GOTO Div7(DivControl);

Div7    :    GOTO Div8(DivControl);

Div8    :    GOTO Out1(DivControl LoadTemp);

Out1    :    CASE (Opcode1 Opcode2)
        0 0 => Idle(MD_Low LoadOut Reset);
        0 1 => Idle(MD_Low LoadOut Reset);
        1 0 => Idle(LoadOut MD_Low Reset);
        1 1 => OutD(LoadOut MD_Low);
        ENDCASE;

OutM    :    GOTO Idle(LoadOut Reset);

OutD    :    GOTO Idle(LoadOut DivOut Reset);