MOSIS Report
REQUEST: REPORT
ID: 59675
P-NAME: mstrmnd
Fab-ID: T01SDJ
P-P: /* I have on file the project password */
REPORT:
This chip design is based on the logic game Mastermind. The Master enters a key, 8 bits representing 4 colored pegs. The Guesser attempts to crack the code in less than 7 guesses. Barrel-shifters and combinational logic determine the score for each guess. Adders, latches, and feedback register each score. The chip uses a MUX to alternate 8 output pins between the entered guess and its corresponding calculated score.
All five chips are fully functional.
The test vector is a concatenation of three games, allowing the low-score feature to be tested. The first game is won in two guesses. The second game is lost when the guesser exhausts the number of guesses allowed (seven). This game is designed to test the scoring capabilities of the chip by inducing a variety in the number of black and white scores. The third game is won in one guess, lowering the low-score component to one.
Using the non-overlapping clocking scheme, the chip fails at approximately 8.5 MHz (34 MHz sampling rate). The failure location is in the output multiplexer, which displays the current guess and score. This failure does not impact the performance of other parts of the chip; the Omnilab analyzer output shows that the chip continues to go through the proper states at this frequency.
A possible reason for the output multiplexers failure is charge sharing. The transmission gates of the multiplexers are controlled by clka and clkabar, so the values at each of the outputs are only transmitted at selected times. Since clkabar is generated from clka through an inverter, the delay could be causing charge sharing at the connected output of the transmission gates.
Using an aggressive clocking scheme (one clock rises as the other falls), the chip similarily fails at 8.5 MHz (17 MHz sampling rate).
URL: http://www.owlnet.rice.edu/~ricky/elec422
SUBMITTED BY:
Ricky Radaelli-Sanchez
ricky@rice.edu
Hilary Scott
hilarys@rice.edu
Alexa Shoning
alexa@rice.edu
REQUEST: END
