| Task | Done by... |
| 12-bit adder | Chris, Eric |
| 4-bit adder | Chris, Eric |
| Algorithm research | Chris, Eric |
| Algorithm verification | Eric |
| Block diagram | Todd |
| FESZ | Todd |
| FESZ Control decoder | Todd |
| Debugging | Chris, Eric |
| Large logic gates | Chris |
| Latch | Eric |
| XOR | Chris |
| Logic gate templates | Eric |
| Multiplexer | Eric |
| PLA | Todd |
| Routing and glue logic | Chris |
| System timing | Todd |
| Testing | Eric, Todd |
| Webpage | Chris, Todd |
| Final IRSIM | Chris |