Introduction
This page lists all of the cells used in our design and contains links to the Magic Layouts, IRSIM simulations, and Spice analysis for each cell. You can traverse through all of the cells within each classification (leaf, sub-block, intermediate block) easily using the navigation bar at the top of each page. The key below also explains what each symbol is used for. We will be updating this page with these symbols as we complete each layout and simulation.
Leaf Cells (Transmission Gate, NAND, etc)
Sub-Blocks (Multiplexer subcells, 4-bit adder, etc.)
Intermediate Blocks (12-bit adder, 8-bit Multiplier, PLA, etc.)
KEY
|
Cell | Magic | IRSIM | Spice |
Transmission Gate |
|
- | - |
Inverter | ![]() |
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NOR | ![]() |
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XOR | ![]() |
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NAND2 | ![]() |
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NAND3 | ![]() |
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NAND4 | ![]() |
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NAND5 | ![]() |
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Latch | ![]() |
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Clearable Latch | ![]() |
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Cell | Magic | IRSIM | Spice |
2x1 Multiplexer Subcell |
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4-bit Carry Lookahead Adder |
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Cell | Magic | IRSIM | Spice |
8-bit Rotate Stack |
|
|
- |
8-bit Carry Lookahead Adder |
|
|
- |
12-bit Carry Lookahead Adder |
|
|
- |
8-bit Radix-4 Booth Recoding Multiplier |
|
|
- |
Control PLA |
|
|
- |