Testing Procedures: We converted our irsim test vector (after some modification in vector names) by a unix script called convert to run on the Omnilab. The testing was done on the machne running Ominlab software which runs on OS2. First phase of test sequence included comparing the irsim output results with omnilab test results. All four chips were tested for all sixteen different operations supported by our chip. In second phase of chip testing, different combinations of inputs generating different sequence of outputs are tested for the consistent behavior of the chip in various kind of permutations. We also tested some special cases like generating carry output, reseting carry ouput etc.
Problems encountered: We are quite happy with the Omnilab instrument and system set-up. Some problems encountered due to other reasons are listed below. (a) We had some wiring problems initially and after tracing back to Magic layout we found the problem and solved it. (b) We encountered problems while converting the irsim command file to Omnilab vector file mainly when there are unequal length of vectors in the command file.
Performance yield : All four chips are functional for all sixteen operations, giving us an yield of 100%.
Speed Test: We reached a maximum speed of 17MHz . In our design (report for VLSI design I), by crystal analysis, we calculated the maximum clock frequency to which our chip can work would be 28 MHz (delay of 35.72ns through adder/subtractor unit). We could get a functional chip at 17 MHz We couldn't go beyond that frequency due to limitation of the setup we used.
MOSIS Report