PIN # | LABEL | DESCRIPTION |
---|---|---|
1 | out4p | output bit 4 |
2 | out5p | output bit 5 |
3 | out6p | output bit 6 |
4 | out7p | output bit 7 |
5 | Vdd | padframe power |
6 | -- | (not connected) |
7 | state0p | PLA state bit 0 |
8 | state1p | PLA state bit 1 |
9 | state2p | PLA state bit 2 |
10 | GND | GND to chip internals |
11 | clkbp | clkb signal input |
12 | restartp | restart signal input |
13 | holdp | hold signal input |
14 | startp | start signal input |
15 | Vdd | padframe power |
16 | clkap | clka signal input |
17 | in7p | input bit 7 |
18 | in6p | input bit 6 |
19 | in5p | input bit 5 |
20 | in4p | input bit 4 |
21 | in3p | input bit 3 |
22 | in2p | input bit 2 |
23 | in1p | input bit 1 |
24 | in0p | input bit 0 |
25 | GND | padframe gnd |
26 | -- | (not connected) |
27 | -- | (not connected) |
28 | -- | (not connected) |
29 | -- | (not connected) |
30 | Vdd | Vdd to chip internals |
31 | -- | (not connected) |
32 | -- | (not connected) |
33 | -- | (not connected) |
34 | -- | (not connected) |
35 | GND | padframe gnd |
36 | coutp | carry output bit (for adder) |
37 | out0p | output bit 0 |
38 | out1p | output bit 1 |
39 | out2p | output bit 2 |
40 | out3p | output bit 3 |