Data Memory (DM) Functional Description
The main function of the Data Memory (DM) is to store 4-bit operands. The Data Memory contains eight 4-Bit memory storage locations. The Data Memory Unit consists of 3 major components: The Memory Address Register (MA), MA Decoder, and the Data Memory Storage. All the latch cells used in the Data Memory are the same as the ones used in the Instruction Memory. While the IM stores instructions, the DM stores data operands. All the memory elements (registers/latches) are qualified with clka.
Memory Address Register (MA)
MA is a 4-bit register that takes the value of the DM storage location from the bus. When the address is ready on the system bus, PLA asserts LDMA to load the address value to the MA Register. This value passes right along to the MA Decoder.
MA Decoder
The MA Decoder takes the 4 MA bits as inputs along with the READDM and WRITEDM signals generated by the PLA. It decodes those 6 inputs into one of its 16 outputs--READ or WRITE signals for each of the eight DM Storage locations.
Data Memory Storage
The DM Storage consists of eight 4-bit storage locations. Each of the bits in the DM Storage is a static latch cell with an extra safety inverter and an extra safety transmission gate to assure that the value inside the latch cell will not be corrupted by whatever is on the bus. This is the same latch cell as the one used for the IM.
The output from the MA Decoder asserts one of the memory locations' READ or WRITE signal. When the WRITE signal of a DM Storage location is asserted, the 4-bit value in the bus is written into that memory location. On the other hand, when the READ signal of a DM Storage location is asserted, the value from that storage location is read to the bus.
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