Cell Hierarchy

chipmonc

• 40p2200 (I/O Pads)
  • io (I/O Pad Cell)

• chip9 (complete CPU without Pads)
  • r_im7 (IM)
    
  • r_dm4 (DM)
    
    • r_ma (MA)
      
      • r_macontrol (MA Control)
        
      • r_mabit (MA Latch Cell)
        
    • r_madeco2 (MA Decoder)
      
    • r_imclatch (DM Storage Control)
      
      • r_imtoplatch (DM Storage top latch)
        
    • r_imlatch (DM Storage Latch)
      
  • alufin (complete ALU)
    
  • pla9 (PLA)
    
  • d_control (Carryout control)
    
  • d_latch (Carryout Latch)
    
  • nor3 (Zeroflag Logic)
    
  • inv_small (Zeroflag Logic)
    
  • d_out (Output Register)
    
    • d_control (OUT Register Control)
      
    • d_latch (OUT Register Latch)
      
  • d_ir (IR Register)
    
    • d_control (IR Register Control)
      
    • d_latch (IR Register Latch)
      
  • d_tp (TP Register)
    
    • d_clatch (TP Control Latch)
      
      • r_toplatch (TP Top Latch)
        
    • r_glatch (TP Latch Cells)
      
  • d_ix (Index Register)
    
    • d_clatch (IX Control Latch)
      
      • r_toplatch (IX Top Latch)
        
    • r_glatch (IX Latch Cells)
      
  • r_in (IN Register)
    
    • r_clatch (IN Control Latch)
      
      • r_toplatch (IN Top Latch)
        
    • r_glatch (IN Latch Cells)
      

This is a Group Project for Elec422.
Members: Rebecca Ma | Jill Nelson | Deborah Watt