IRSIM Simulation of ALU and Subcells

Note that the list below gives an implicit cell hierarchy for cells within the ALU. For example, decoden, all, j_buff, j_pclatch, jgate, muxj, mux, and inv_small are all direct subcells of alufin. The next indentation of the list shows subcells of these subcells, etc.

• alufin (complete ALU)
  alufin command file

  • decoden (opcode decoder)
    decoden command file

  • all (combinational logic for one bit)
    all command file
    • and (2-input and gate)
      • nand (2-input nand gate)

    • xor (2-input xor gate)

    • xor2 (custom-height 2-input xor gate)

    • r_and (custom-height 2-input and gate)
      • r_nand (custom-height 2-input nand gate)

    • or3 (3-input or gate)

  • j_buff (accumulator buffer)
    • j_control (control cell for accumulator buffer)

    • j_latch (one bit of accumulator buffer)

  • j_pclatch (accumulator)
    • j_pccontrol (control cell for accumulator)

    • j_pcbit (one bit of accumulator latch)

  • jgate (2-input mux--makes up output multiplexor)

  • muxj (2-input mux--makes up accumulator multiplexor)

  • mux (2-input mux--determines source of carry in bits)

  • inv_small (inverter used in several locations in alufin)