The arithmetic block independently performs 8-bit two's complement addition and subtraction on the values contained in the A and B operand registers and can place the result on the output bus. When combined with a self-shifting B operand register and a self-shifting output register, the block is capable of performing 8-bit unsigned multiplication with 16-bit output.
In addition to the numerical result, the block produces carry-out and overflow bits for addition and subtraction operations. It is not possible for the final result of an unsigned multiplication operation to have a carry-out or overflow.
The details of the design and implementation of the arithmetic block can be found in another document.
The various components of the arithmetic block were simulated individually and as a unit. The results can be found in another document.
The timing analysis can be found in another document.