Welcome to the VLSI Design I class at Rice University - Fall 1997

• More about the VLSI Design Class
• VLSI Design Faculty:
  • Joe Cavallaro
  • Aria Nosratinia

Handouts

• Handout #1
• Handout #2
• Handout #3
• Milestones Handout
• Notes on PLA Design
• Notes on IRSIM Test Vectors
• Notes on Decoder/ROM Design using PLA Tools
• Notes on Crystal Timing Analysis
• Notes on Ring Oscillators

Projects for Fall 1997:

• Raymond Walker, Seth Horwitz, Dennis Wu -- Group A - Sandman BL photo
• Vadim Kazakevich, Zinovy Pugach, Armen Kroyan -- Group B - test results - 8b_alu BS photo
• Chris Hughes, Corey Pie' -- Group C - Pipe BM photo
• Dhananjay Joshi, Vishwas Sundaramurthy, Chu Xiang -- Group D - Alugobi BT photo
• Fulong Zhang, Samuel Swiderski, David Long -- Group E - Alu_sqrt BR photo
• Shion Hung, Theodore Howard, Kurt Krukenberg -- Group F - Enchilda BP photo
• Brian Chesney, Marcus Ramirez, Heungjoo Suh -- Group G - Nanny BN photo
• Rebecca Ma, Jill Nelson, Deborah Watt -- Group H - Chipmonc BQ photo
• Han Kim, Leel Favichia -- Group I - Vanilla BK photo

MOSIS Run Status

The fall 1997 projects were fabricated using the AMI 1.2 micron CMOS process through MOSIS. The class projects were included in the N81X MOSIS run.

• Overview of combinational Logic and minimization
• Sequential logic and Finite State Machines
• Overview of semiconductor physics
• PMOS and NMOS transistors
• CMOS fabrication technology (crystal growth, wafers, lithography, masks, doping, etc.)
• Layout, design rules, stick diagrams
• The latch-up effect, prevention, well contacts
• Common structures (gates, compound gates, latches, shifters, PLA's)
• Clocking strategies, 2-phase non-overlapping clock, Karplus methodology
• Design Process - hierarchical design (regularity, modularity, locality)
• Design verification tools (simulators, netlist comparators, DRC checkers, etc.)
• MOS equations, second-order effects.
• Biasing, AC and DC characteristics, load lines
• Circuit parameters, parameter extraction
• Timing, power, and size tradeoffs
• Other CMOS structures: dynamic CMOS, pseudo NMOS, BiCMOS
• Introduction to testing and testability
• Analog CMOS