SNOWBALL
`Group F'

Chip testing and final report

Initial project proposal

• Revised project proposal

• Initial Design

Functional Description

• Pin Layout

Circuit Design and System Timing Diagram

• Overall Logic Diagram

• Combinational Square Logic Diagram

• Square Root Algorithm Diagram

• Irsim Results of Subcells

• Irsim Results of SNOWBALL

PLA Description (detailed)

• PLA MEG file

• PLA Irsim file

Plots of low-level and entire chip can be accessed through the clickable image map above.

• Cell Hierarchy

• Floorplan for Circuit

Performance Analysis

Summary